1. Technical Field
Example embodiments of the present inventive concepts relate to a semiconductor device including a low power retention flip-flop.
2. Description of the Related Art
In order to design a low power semiconductor chip, a power gating technique may be used to reduce the leakage current by shutting off a power supply to blocks of a circuit that are not in use. In order to use such a power gating technique, data in a flip-flop may be moved to a different location when cutting off the power supply. To this end, a method of cutting off the power supply after storing data in a retention flip-flop for data retention has been used. Thus, research on the retention flip-flop has been actively conducted.